The big picture

The Big Data revolution requires an unprecedented level of data storage and computation. Hence data deluge will be the dominant factor that will drive the design of the next generations computing systems. Computing with this amount of unstructured data is a challenging task. One of the major limitations in current computing systems is the cost of transferring data between memory and processors. This is due to the limited bandwidth and high power requirements for off-chip data transfers. The energy spent to send or receive data from/to a DRAM memory is nowadays three orders of magnitude larger than that used to perform a double precision floating-point operation. Even if the applications that analyze big data are extremely varied, very often the basic functions performed on this enormous set of data-points are similar. These functions are related to managing, updating, sorting, merging, and extracting data from the data set, or to search for correlation between different data sets. These workloads are I/O intensive often with random access patterns to small-sized objects. The solution to reduce the transfer of data from the memory to the processing unit is known as the logic-in-memory concept. It consists in directly inserting in the memory chip, which has huge internal bandwidth, some logic functionality necessary to perform basic memory-centric operations. Eliminating the external communications between memory and logic not only improves the bandwidth but also improves the latency, as logic and storage are closer to each other. Furthermore, this can be achieved at marginal silicon cost increase, since on-chip memory nowadays represents more than 70% of the total silicon area.

The idea of moving the computation to the memory chips has been discussed for many years, but not yet successfully implemented, mostly due to the different process requirements for memory and logic implementation. The onset of emerging memory technologies with logic-friendly process has opened up new avenues for logic-in-memory architectures. Another important parameter to take into consideration is the non-volatility of the memory, e.g. its capacity to retain data when the power is turned off. Not only does this enable ultra-low power leakage in stand-by mode, which is critical for portable applications, it also offers the capability to turn off power from the processor core, potentially down to the individual logic gate, almost on-demand, paving the way for the "instant-on/normally-off computing".

Because of the foreseeable end of CMOS scaling, new technologies are under development, such as Non-volatile Memory (NVM) technologies, Photonics, Resistive Computing, Neuromorphic Computing or Quantum Computing. The technologies will strongly impact the hardware and software of future high-performance computing systems, in particular the processor logic itself, the (deeper) memory hierarchy, and new heterogeneous accelerators. The opportunity may be development of competitive new hardware/software technologies based on upcoming new technologies to advantageous position European industry for the future.

The work needed

Spin electronics has been identified as one of the most likely technology for the next generation of non-volatile random access memory. Spin electronics is a very successful example of how fundamental research, with a lot of pioneer contributions done in Europe, can rapidly lead to important applications with large industrial markets. From the use of giant magnetoresistance (whose discovery was awarded by the Nobel prize in 2007) in field sensors and read heads for hard disk drives, to the new generation of non-volatile magnetic memories based on magnetic tunnel junctions exploiting the tunnel magnetoresistance and spin transfer torque effects, the emerging field of spin electronics was on the leading edge of the information revolution. More recently, new and efficient ways for manipulating the magnetization in highly integrated spintronic devices offer promising perspectives for the development a new generation of low power reconfigurable spintronic storage and/or logic devices.

• Spin Orbit Torque, which has the promise of ultra-fast (multi GHz) deterministic switching
• Voltage controlled spintronics
• Novel optical materials and structures that allow the intertwining and the synergy between spintronics and photonics will be a dream for the next generation of magneto-opto-electronics devices, recording technologies and biomedical.
• Highly integrated magnonic logic circuits can also offer an alternative to CMOS computation. The power consumption of magnonics circuits is expected to be orders of magnitudes smaller than that of charge based electronics, the little amount of dissipated power can even be harvested back using caloritonics nanoscale devices based on the spin-Seebeck effect

The opportunity

Thanks to the intrinsic non-volatility of nanomagnets, and their compatibility with CMOS processes, spintronics can bring massive embedded memory to unconventional circuits, and is a playground to investigate and generate novel physical effects for brain-inspired computing, such as tunable fast non-linear dynamics, controlled stochasticity and multifunctionality. Whilst there is still some way to go towards the Promised Land, on thing is for sure: these new technologies will bring paradigm changes to the processor core and system architectures.