At the moment there are major changes going on in the computer industry: The traditional approach was to carefully separate safety-critical and non-safety-critical functions in any application. Now there is the need to move towards multicore processors. This is saving space, weight and energy. “But it also raises issues of separation and how can we guarantee that non-safety critical functions do not affect other functions? “As Haydn Thompson (from THHINK) puts it. “There is a need to be smarter and safer in an increasingly complex world.”
Let´s take the example of the board computer of a car: Automotive currently uses many processors throughout the car to provide different functionality. This is segregated into different functionalities with separate databus connections, e.g. for infotainment and safety-critical vehicle control. By having lots of boxes it is expensive, complicated and heavy. By integrating functionality into less units the system can be simplified with fewer boxes and provide more functionality for users. (A bit like our smart phones, that allow you to call, surf the web, take photos, play music/games etc. all on one small device)
In the past processing speed and functionality doubled according to Moore’s Law as higher and higher clock speeds were used. This is no longer possible due to the density of the transistors on devices and the problem of trying to get heat out from the processor. The industry has moved towards multiple cores to address this: effectively more processing power is provided by using more than one computing core. These multicores are operated at lower speeds to manage the thermal problem. But to save complexity they share key resources, e.g. memory and on-chip connections for communications. This sharing makes it impossible to prove that critical timing needs can be met and thus applications using multicores cannot be certified for safety-critical applications in aerospace, rail, etc. (i.e. that critical software produces results within critical deadlines).
The projects presented at the Milano block review are working on different aspects of mixed criticality systems:
PROXIMA – A radical new technique for timing analysis which can be employed for both conventional processors, programmable logic and multicore processors.PROXIMA is working on reliability, analyzability and performance with a concentration on development of a new technique for proving that time deadlines will be met. As highlighted traditional approaches cannot be used so the project is working on a new technique that uses probabilistic analysis. The project is working with the certification authorities to pave the way for early adoption of this technique in industry.
CONTREX – A holistic approach to considering performance parameters, timing, power and temperature with specific relevance to battery powered equipment.CONTREX – is working on techniques to allow different functionalities to be integrated onto multicore platforms. Here the focus is on design and analysis of power consumption, temperature and timing constraints early in the design before hardware is available. Power consumption and thermal management is particularly important for applications that are battery powered, e.g. mobile devices.
DREAMS – Development of an architectural style that can be used for safe, reliable and secure networked multicore systems. DREAMS – is defining an architectural style for networked multicore chips considering safety, security, real-time support and adaptivity. Here an aim is to quickly adapt functionality to different applications or product lines much as they do in the smart phone industry where different variants can be supplied with different functions. This product line approach based on a model driven methodology is targeted at promoting widespread adoption of the technology.
In order to check the results of the cluster review, portfolio analysis and communication reports, please check the links below: