Digital Agenda for Europe
A Europe 2020 Initiative

ICT 2010

PULLNANO: Pulling the limits of Nanocmos electronics

This is a technology or research stand, located in Zone R2 - ICT inside. Stand number: R2-08

Help is at hand for Europe’s chip manufacturers in the global market thanks to the PULLNANO project which is ‘pulling the limits of nanoCMOS electronics’.

A presentation of the PULLANO project will include the demonstration of a new generation of decoder chips for hybrid internet/broadcast-TV set-top boxes. These will deliver enhanced user experiences and allow consumers to watch broadcast, internet or personal content on the TV, intuitively and at any time. They also support 3D graphics user controls, 3D TV, content protection, and connections to external devices. The design is based on advanced CMOS (complementary metal–oxide–semiconductor) technology and has market-leading energy efficiency due to its low power configurable architecture and manufacturing process. There will also be a display of a 300mm CMOS wafer and a video related to advanced microelectronics manufacturing.

www.st.com/stonline/stappl/cms/press/news/year2007/t2191.htm

Technical description

Coordinator: Gilles THOMAS (STMicroelectronics, TR&D, France)

ID: 3096